Autorouter doesn't follow clearance req with preplaced static vias?

[sponaugle]

I am having an unusual behavior where if I do an autoroute on a 4 layer PCB I'm working on: The traces that are auto-routed seem to not follow the correct VIA TO TRACE clearance if the VIA in question is a static VIA that I placed before the autoroute.

Screenshot 2024-04-18 115159.png (166.73 KiB) Viewed 9485 times

You can see here the DRC violation where the trace is .00839 away, while the rule is 0.01. This only happens with the static vias that are placed before I autoroute.

The clearance rules from the net class are:

Screenshot 2024-04-18 115214.png (141.38 KiB) Viewed 9485 times

You can see the VIA to TRACE is 0.01, and if you look at the DRC:

Screenshot 2024-04-18 115235.png (67.31 KiB) Viewed 9485 times

It shows to .01 Via to Trace, which is confirmed in the DRC error.

The static via is in the GND net, which is the second class that has the same clearance values. The Class-To-Class specifically says it is just for DRC not auto routing. Via to GND that are inserted by the auto-router have the correct clearance.

A second unrelated by interesting thing is the DRC reports errors where the clearance is equal to the actual value, which I assume is because the actual values have more precision than what the DRC display and the actually is slightly less than the clearance.

I assume I am missing something obvious on my part!

[Alex]

It looks like the following. The autorouter handles with static vias created prior autorouting as with TH pads. So it creates traces closer to static vias than it is allowed by the rules. Later, DRC finds these violations.
You can increase the pad-to-trace clearance in the design rules and reroute the board. Or manually fix the violations after autorouting.

Switch units to mm or mils to see more precision values in DRC report.