DipTrace 4.2 Release

[novarm44]

Hi All,

We have published stable version 4.2 today. You can download it here: https://diptrace.com/download/download-diptrace/
The list of new features (radial placement and alignment of the groups have been added if compare to 4.2 beta):

- New XML format for component and pattern libraries.
- Environment Variables in all paths, support of related project/program paths for libraries/models/pictures.
- Ability to make a portable version of the program ( https://diptrace.com/docs/diptrace_portable.pdf ).
- Pause routing (allows editing other traces/vias and resuming routing in one key press).
- Continue routing option in net merge/move pad submenu.
- Radial / Polar Placement of design objects in PCB Layout and Pattern Editor.
- Group is aligned as a single object in the Align Objects feature.
- Edge rails for a single board option.
- Edge rail width for V-score panelizing of a rectangular board does not include the "Board to Edge/ Board to Board" gap.
- Side and isometric view buttons in 3D preview dialogs.
- Display/Find vias by style on the layout.
- Submenu for creating pattern internal pad-to-pad connection (avoid accidental creation).
- New and updated pattern libraries:
Con TB Headers (Pitch 3.50mm, 3.81mm, 5.00mm, 5.08mm, 7.62mm);
Con USB (2.0, 3.0);
DFN (3 Pins, 4 Pins);
DPAK (Pitch 1.27mm, 2.28mm, 2.29mm, 2.30mm);
Diodes (Axial, DFN 2 Pins, DFN 3 Pins, MELF, Molded, SOD, SOFL);
Fuses (Chip Inch, Chip Metric, Holders, Radial Dipped Rectangular, Radial Disk);
LED (Axial, Chip, Chip Corner Concave, Chip Side Concave (2,4,6 Pins), Molded (PLCC-2), Radial Round (3mm, 4mm, 5mm, 8mm, 10mm), Radial Rectangular, Radial Oval, Radial Cylindrical, SOD, SODFL, DFN, SOL (PLCC-4, PLCC-6, PLCC-8), TO Cylindrical);
Modules;
Sensors (Axial, Chip, Chip Corner Concave, DFN, DIP, Molded (PLCC-2), Radial Round, Radial Rectangular, SOD, SODFL, SOT, TO Cylindrical, Others);
SOT23-3 (Pitch 0.50mm, 0.65mm);
SOT143 (Pitch 1.30mm, 1.90mm, 1.92mm);
Transistors DFN 3 Pins;
Switches Toggle;
Uncategorized.
- New and updated component libraries:
Con TB Headers (Pitch 3.50mm, 3.81mm, 5.00mm, 5.08mm, 7.62mm);
Con USB (2.0, 3.0);
IC MPU MCU Modules;
Opto Emitters LED (SMD, THT, Bi-Color, RGB, RGBW, Infrared, Ultraviolet);
Power & Protection Fuses (Chip Inch, Chip Metric, Holders, PTC Resettable);
RF Modules;
Sensors Optical (Photodiodes, Phototransistors, Optosensors, IC Optosensors, Photoconductive Cells);
Sensors Temperature (Thermistors PTC, RTD, Analog Output, Digital Output, Voltage Current Output, Thermostats);
Sensors Inertia (Accelerometers, Gyroscopes, Tilt Inclinometers);
Sensors (Magnetic, Pressure, Media Gas, Humidity, Encoders, Capacitive Touch Proximity, Image Camera, Angle Linear Position Measuring).
- LCSC Part Numbers have been added to the additional fields of the components (used by a Chinese PCB manufacturer – JLCPCB).
- New 294 STEP models for some unique patterns of the following libraries: BGA, DFN, Diodes Bridge, DIP Peg Leads, LCC, LGA, Optosensors & LED, Oscillators, QFN, SOFL, SOP, SOT.
- Bug fixes: https://diptrace.com/docs/fixes4_2.pdf

Regards,
Stanislav Ruev
DipTrace Team

[T.Nakamura]

Congrats to have new release!
Is there any instruction to make Diptrace portable?

[Serg]

Congrats to have new release!
Is there any instruction to make Diptrace portable?

We will prepare step by step instruction and upload it on the site.

[T.Nakamura]

Got it, thank you!
Look forward to see it shortly.

[novarm44]

Got it, thank you!
Look forward to see it shortly.

The instruction how to make DipTrace portable:
https://diptrace.com/docs/diptrace_portable.pdf

[FDA]

This problem has not been fixed yet.
viewtopic.php?t=12577

[Serg]

This problem has not been fixed yet.
viewtopic.php?t=12577

To improve partly 3D Preview for "plated half holes" you can temporarily use "Hide Pad Ring in Layer" option from pad context menu.
Also "step" file doesn't contain any pad rings.

[octal]

This problem has not been fixed yet.
viewtopic.php?t=12577

Even well known very expensive EDA software don't show castelated holes correctly. They all show full plated vias but generates correct gerber output for their fabrication (if fab company is able to produce such PCBs). I can't see how Diptrace team can improve that. They better spend time on Push and Shove and other useful enhancements.

PS. Just my own opinion, don't blame me.

[0xdeadbeef]

Well, I reported this three years ago, so I don't expect it to be fixed for another 5-6 years or so given the typical speed of fixing things. And yes, push'n'shove was promised for much, much longer.

[matttay]

> - Submenu for creating pattern internal pad-to-pad connection (avoid accidental creation).

Hi @novarm44, how does the above work? Looks like something in the pattern editor, but I cannot find a submenu and the help file lists nothing obvious.