- Version 5.2.0.4.
- I have a through hole pad on the top layer.
- Bottom layer is set to plane, with 0.5mm fixed rings for PTH.
- This is correctly reflected in DipTrace.
- I export the PCB to ODB++ (with swell/shrink set to 0 as prescribed by Aisler, but it doesn't seem to change things).
- In the resulting ODB++, this ring seems to be about 0.25mm wide instead. Both Aisler (found out after manufacturing) and a free online viewer interpret it this way.
- I'm attaching some screenshots.
- Screenshot 2026-01-21 222205.png (23.97 KiB) Viewed 1584 times
- Screenshot 2026-01-21 222339.png (8.48 KiB) Viewed 1584 times
- Screenshot 2026-01-21 222827.png (30.97 KiB) Viewed 1584 times
- Screenshot 2026-01-21 222931.png (15.81 KiB) Viewed 1584 times