Holes in thermal SMT pads in Pattern Editor?

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Exality
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Holes in thermal SMT pads in Pattern Editor?

#1 Post by Exality » 13 Aug 2018, 12:29

These days mfrs are specifying hole size & placement inside the SMT thermal pads underneath their power ICs. I can add static vias in layout to do this, but I would like to put the thermal holes in the original pattern definition so I don't have to look up the IC data again at layout time.

But I can't figure out how to do this without causing DRC errors in layout. Does anyone have a good method for this?
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Alex
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Re: Holes in thermal SMT pads in Pattern Editor?

#2 Post by Alex » 14 Aug 2018, 08:33

You can put small through-hole pads over thermal pad in Pattern Editor. When you attach the pattern to a component in Component Editor or Schematic link thermal pad and through-hole pads to the same pin. That will prevent further DRC and connectivity errors in PCB Layout.

Exality
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Re: Holes in thermal SMT pads in Pattern Editor?

#3 Post by Exality » 14 Aug 2018, 11:42

Thanks, Alex. I have done this before to map one component pin to multiple pattern pads, but it doesn't seem to work here.

The first problem is getting Component Editor to see the through holes in order to connect them to the SMT pad. With the SMT pad on top of the through holes Component Editor doesn't see the holes. I had to move the large SMT pad out of the way in Pattern Editor, save the pattern, load it into Component Editor, connect the pad & holes, save the component, move the SMT pad back on top of the through holes in Pattern Editor, save again, and re-load the component. At that point all my holes were connected to the larger SMT pad. This process is really not good, since you have to do it for every component which uses the pattern.

And I'm still getting the same DRC errors in layout, after updating the component from the library. I've checked that the update is happening by changing pin numbers of the through holes in Pattern Editor and verifying it in layout. Layout tells me "Pad U1:17 - Pad U1:17a (Gap=0 mm, Rule=0.152 mm)", where U1:17 is my large SMT pad and U1:17a is one of the through holes. I get the same DRC error for all through-holes, plus drill clearance errors.
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Serg
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Re: Holes in thermal SMT pads in Pattern Editor?

#4 Post by Serg » 15 Aug 2018, 07:43

You can around the problem using the next way:
- do not create the wires in Component Editor,
- place the component in PCB Layout,
- choose items Connection Manager from main menu Route,
- add the new net,
- add smd pad and through pads in created net.

Exality
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Re: Holes in thermal SMT pads in Pattern Editor?

#5 Post by Exality » 15 Aug 2018, 11:49

This works, but it's awfully awkward. There can be many thermal holes on many ICs, and they each need to be individually added. Also, when you Renew Layout From Schematic the added holes are lost. Renew usually happens a few times during layout, as things change and to keep the schematic and layout in sync.

So, this works, but it's not a good solution.
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Exality
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Re: Holes in thermal SMT pads in Pattern Editor?

#6 Post by Exality » 24 Aug 2018, 14:07

Here is another workaround which avoids DRC errors and pattern warnings, persists across Renew Layout From Schematic, and provides correct netlist connectivity:
  • In the pattern, do not place the through-holes. Instead, place .01 mm line width crosshairs on the Bottom Assy (or other unused) layer where the thermal holes should go, and 1-point text on the same layer saying, e.g. "0.3 mm vias".
  • In Layout, place static vias at the crosshairs of the pattern. You may need to hide some layers to see the crosshairs.
  • One by one, add the vias to the net the SMT pad is connected to.
  • Group the static vias and the component together.
This is really ugly and cumbersome, but it gets the job done.
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KevinA
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Re: Holes in thermal SMT pads in Pattern Editor?

#7 Post by KevinA » 25 Aug 2018, 10:31

Giving the users the tools needed to get boards built;
The ability to to place thermal pads inside SMD devices
The ability to place cross hatched paste patterns
The ability to place board mounting holes and fiducial on panelized boards
The ability to place V-Cut information on the Board layer
The ability to place router paths on the Board layer
The ability to draw curved router paths with DipTrace
Push and shove will be a great feature but getting the/a board built in a reasonable time, cost effectively, with today's technology requires several new features (listed above).
My learning curve, from a round PCB to one that can be used with paste printer and pick and place machines.
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