Search found 4078 matches

by Alex
01 Oct 2025, 09:10
Forum: Bug reports
Topic: Library error - DISPLAYVIS_EAOLEDL128-6GGA
Replies: 1
Views: 6683

Re: Library error - DISPLAYVIS_EAOLEDL128-6GGA

Thank you for the report, we will check the patterns in the library.
by Alex
16 Sep 2025, 05:51
Forum: Making Libraries in DipTrace
Topic: Renesas RA Library
Replies: 1
Views: 25503

Re: Renesas RA Library

You can search for the component at SnapMagic (Objects -> Search Parts at SnapMagic from the main menu). If neither of available components matches, you can create your own component in a custom library.
by Alex
16 Sep 2025, 05:44
Forum: DipTrace PCB Layout
Topic: Via Settings
Replies: 1
Views: 15549

Re: Via Settings

You can convert trace vias to static. Just right click on a trace via, select "Convert Via to Static" then one of available options. For static vias, you can edit soldermask settings.
by Alex
16 Sep 2025, 05:37
Forum: DipTrace PCB Layout
Topic: I want to display Via Land.
Replies: 1
Views: 13973

Re: I want to display Via Land.

Do you mean the vias are not imported from DXF file at all or via lands are imported but not filled? Please let me more details and send the DXF file if possible.
by Alex
02 Sep 2025, 03:46
Forum: Feature requests
Topic: Add ability to export silk and copper layers in STEP export
Replies: 3
Views: 26962

Re: Add ability to export silk and copper layers in STEP export

We didn't add silk and copper objects to STEP export to avoid huge size of exported STEP files. We will consider making an option (probably turned off by default) so that user decides whether to add silk and copper to STEP file or not.
by Alex
13 Aug 2025, 13:04
Forum: Bug reports
Topic: Hotkeys in child windows
Replies: 1
Views: 19179

Re: Hotkeys in child windows

Thank you for the report, I see what you mean. We will investigate the problem.
by Alex
01 Aug 2025, 12:19
Forum: DipTrace Schematic Capture
Topic: Implementation of Net-ties
Replies: 2
Views: 18610

Re: Implementation of Net-ties

You can use bigger than 0805 resistor or create a custom pattern for a jumper wire or ferrite bead if you need 100 mil spacing or more.
--
We revise feature list to implement in future versions and the net-ties is in the list as this feature has been requested quite often.
by Alex
01 Aug 2025, 12:09
Forum: DipTrace PCB Layout
Topic: How to incorporate cutouts in board outline
Replies: 3
Views: 18703

Re: How to incorporate cutouts in board outline

Set appropriate grid size, 0.5 mm for example. Click "Place Board Outline" icon and start the first side of the board outline. Click the next point at 6.5 mm to the board corner, then right click, choose "Arc" from submenu, define arc center and arc finish point. Then continue board outline and make ...
by Alex
31 Jul 2025, 10:32
Forum: Off-topic
Topic: Connecting a through-hole pad to the bottom copper (ground)
Replies: 2
Views: 32645

Re: Connecting a through-hole pad to the bottom copper (ground)

The pad and the copper pour should belong to the same net, they will be connected automatically if you updated the copper pour. So, if the copper pour is disconnected from proper net, you can right click on the copper pour outline, go to properties then the connectivity tab and select a net from ...
by Alex
29 Jul 2025, 08:20
Forum: DipTrace PCB Layout
Topic: PCB Layout Questions and Best Practices
Replies: 1
Views: 18478

Re: PCB Layout Questions and Best Practices

This is forum for DipTrace users. If you need help with KiCad you can ask for it in a different forum.